Design(スキル)の転職・求人検索結果

神奈川県

最大手ファンダリーのDesign Methodology/Flow Development Manager & EngineerReport To: Director or Sr. Manager Role: *Digital Design Methodology/Flow Development for TSMC advance technologies. * Responsible for design/technology performance/power/area (PPA) analysis and optimization for TSMC advance technology nodes. * EDA tools Enablement & Certification * Customer’s design flow support Responsibility: * Design/Technology PPA analysis and optimization * EDA Tool Enablement & Certification *Customer’s design flow support

◆学歴 ・大学卒以上 ◆経験・スキル Requirements: *Education: - M.S. degree or above in EE/CS * Minimum of 3+ years of working experience in digital design, design flow & chip implementation related field. * Familiar with APR tools (such as Cadence Innovus and Synopsys IC Compiler) & PPA analysis/boost methodology *Proven capabilities in design flow development, customer’s design flow support & cross functional communication skill would be preferred. *Language: -Proficiency in English is basic requirement. Proficiency in Chinese is a plus. *Personal Attributes -Team player with good communication skills, responsibility & flexibility. -Strong skill to go into technical details to find flow solutions for customers ◆英語スキル ・ビジネスレベル

株式会社A・ヒューマン

神奈川県

最大手ファンダリーのMemory Design Engineer and Manager＊SRAM architecture design ＊Read and write critical path design and analysis ＊Design of key building blocks (sensing, analog, high voltage, DFT) ＊Chip-level design verification ＊Embedded non-volatile memory compiler and productization ＊Co-work with product/reliability engineer on silicon characterization and reliability qualification

◆学歴 ・大学卒以上 ◆経験・スキル ＊The candidates should have at least bachelor degree with 10 years of experiences, master degree with 3 years of experience or PhD degree in relevant field. ＊Memory experts in the field of SRAM. ＊Familiar with bit cell characteristics (Vmin, bit cell performance, write margin), sense amplifier design, high sigma variation analysis, race check, margin signoff. ＊Knowledge on high speed and low Vmin design is a plus. ＊English is a plus ◆英語スキル ・ビジネスレベル

株式会社A・ヒューマン

神奈川県

最大手ファンダリーのMemory Design Engineer and Manager＊SRAM architecture design ＊Read and write critical path design and analysis ＊Design of key building blocks (sensing, analog, high voltage, DFT) ＊Chip-level design verification ＊Embedded non-volatile memory compiler and productization ＊Co-work with product/reliability engineer on silicon characterization and reliability qualification

◆学歴 ・大学卒以上 ◆経験・スキル ＊The candidates should have at least bachelor degree with 10 years of experiences, master degree with 3 years of experience or PhD degree in relevant field. ＊Memory experts in the field of SRAM. ＊Familiar with bit cell characteristics (Vmin, bit cell performance, write margin), sense amplifier design, high sigma variation analysis, race check, margin signoff. ＊Knowledge on high speed and low Vmin design is a plus. ＊English is a plus ◆英語スキル ・ビジネスレベル

株式会社A・ヒューマン

神奈川県

最大手ファンダリーのMemory Design Engineer and Manager＊SRAM architecture design ＊Read and write critical path design and analysis ＊Design of key building blocks (sensing, analog, high voltage, DFT) ＊Chip-level design verification ＊Embedded non-volatile memory compiler and productization ＊Co-work with product/reliability engineer on silicon characterization and reliability qualification

◆学歴 ・大学卒以上 ◆経験・スキル ＊The candidates should have at least bachelor degree with 10 years of experiences, master degree with 3 years of experience or PhD degree in relevant field. ＊Memory experts in the field of SRAM. ＊Familiar with bit cell characteristics (Vmin, bit cell performance, write margin), sense amplifier design, high sigma variation analysis, race check, margin signoff. ＊Knowledge on high speed and low Vmin design is a plus. ＊English is a plus ◆英語スキル ・ビジネスレベル

株式会社A・ヒューマン

神奈川県

最大手ファンダリーのDesign Methodology/Flow Development Manager & EngineerReport To: Director or Sr. Manager Role: *Digital Design Methodology/Flow Development for TSMC advance technologies. * Responsible for design/technology performance/power/area (PPA) analysis and optimization for TSMC advance technology nodes. * EDA tools Enablement & Certification * Customer’s design flow support Responsibility: * Design/Technology PPA analysis and optimization * EDA Tool Enablement & Certification *Customer’s design flow support

◆学歴 ・大学卒以上 ◆経験・スキル Requirements: *Education: - M.S. degree or above in EE/CS * Minimum of 3+ years of working experience in digital design, design flow & chip implementation related field. * Familiar with APR tools (such as Cadence Innovus and Synopsys IC Compiler) & PPA analysis/boost methodology *Proven capabilities in design flow development, customer’s design flow support & cross functional communication skill would be preferred. *Language: -Proficiency in English is basic requirement. Proficiency in Chinese is a plus. *Personal Attributes -Team player with good communication skills, responsibility & flexibility. -Strong skill to go into technical details to find flow solutions for customers ◆英語スキル ・ビジネスレベル

株式会社A・ヒューマン

東京都

当職務はデータ・ガバナンス＆ストラテジーのポジションとして、データ戦略、ガバナンス整備、データ施策のプランニングと実行における卓越したスキル・知識・ノウハウ・経験を有し、当社のビジョンに合った思考および資質を有する事が要求される。 下記職責をメイン業務とし、リーダーシップおよびオーナーシップを持ってデータ関連業務を牽引し、会社の発展・成長に貢献する。 ・Work on the organization-wide initiative to design and develop data governance policies, procedures and data management practices ・Independently work with country for implementation and execution on data governance with framework (Data Quality, Catalogue, Lineage and Metadata Management, etc.), procedures, data quality, data rules and policies, data standards and data governance detail plans; 【業務内容】 当社、及び、当社グループに存在する顧客データや契約情報、各種ログ（コンタクトログ、WEBログ、広告ログ、サービス利用ログ等）様々なビッグデータを利用し、機械学習・AIを活用し、金融サービスの高度化を実現する 1) 経営課題の把握と分析提案（何を・なぜ・どのように分析すべきかを整理し提案） 　・ユーザーと協業したビジネス上の課題の洗い出しと優先順位付け 　・データ戦略において解決すべき課題と達成目標の明確化と仮説の立案 2) データガバナンス関連の業務（データ品質・管理、データガバナンスポリシーなど、本社ガイドラインに準拠し当社におけるデータガバナンスを整備・管理する） 3) ドキュメンテーション（提案書・報告書の作成） 4) プレゼンテーション（提案・報告の実施） 5) その他（データ戦略、データガバナンスなど周辺のデータ関連業務への支援） 6) その他（組織力向上のために、データサイエンスの知識や経験の共有）

【QUALIFICATIONS / EXPERIENCE】 ・Bachelor's or higher in Business, Mathematics, Finance, Computer Science, MIS, Data Science, Statistics or others similar field is preferred, but not mandatory; ・7-8 years of experience in data stewardship, data management, data analytics, or related data field to proven experience in Data and AI Governance; ・At least 5 years in data governance and data strategy consultancy and implementation experience ・Experience in Data Strategy, Data Scientist, Data Governance initiatives including but not limited to Master Data Management and possible technology issues; 【KNOWLEDGE & TECHNICAL SKILLS】 ・Knowledge of industry leading data quality, reference data management and data protection management practices. ・Knowledge of data governance practices, business and technology issues related to management of enterprise information assets and approaches related to data protection. ・Knowledge of data related government regulatory requirements and emerging trends and iss

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